JPH045315B2 - - Google Patents

Info

Publication number
JPH045315B2
JPH045315B2 JP56113012A JP11301281A JPH045315B2 JP H045315 B2 JPH045315 B2 JP H045315B2 JP 56113012 A JP56113012 A JP 56113012A JP 11301281 A JP11301281 A JP 11301281A JP H045315 B2 JPH045315 B2 JP H045315B2
Authority
JP
Japan
Prior art keywords
information
channel memory
spm0
memory
main channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56113012A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5815394A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11301281A priority Critical patent/JPS5815394A/ja
Publication of JPS5815394A publication Critical patent/JPS5815394A/ja
Publication of JPH045315B2 publication Critical patent/JPH045315B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP11301281A 1981-07-21 1981-07-21 通話路メモリの二重化方式 Granted JPS5815394A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11301281A JPS5815394A (ja) 1981-07-21 1981-07-21 通話路メモリの二重化方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11301281A JPS5815394A (ja) 1981-07-21 1981-07-21 通話路メモリの二重化方式

Publications (2)

Publication Number Publication Date
JPS5815394A JPS5815394A (ja) 1983-01-28
JPH045315B2 true JPH045315B2 (en]) 1992-01-31

Family

ID=14601218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11301281A Granted JPS5815394A (ja) 1981-07-21 1981-07-21 通話路メモリの二重化方式

Country Status (1)

Country Link
JP (1) JPS5815394A (en])

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6135698A (ja) * 1984-07-27 1986-02-20 Fujitsu Ltd 時分割通話路装置の系選択方式
US4772007A (en) * 1984-10-19 1988-09-20 Canon Kabushiki Kaisha Cut sheet holding and feeding apparatus
JPH0691428B2 (ja) * 1985-01-23 1994-11-14 株式会社日立製作所 フリツプフロツプ回路

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5176904A (ja) * 1974-12-27 1976-07-03 Nippon Telegraph & Telephone Tokibunkatsutsuwaroyobihoshiki

Also Published As

Publication number Publication date
JPS5815394A (ja) 1983-01-28

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